Cycles, instructions, fixed point and floating point counters

Using Event set 53 gives access to counters of cycles, total instructions, floating point and fixed point operations. The counter for the usage of hardware square roots (FSQRT) is unique to this event set. Further floating point counters can be found in event set 60.

Raw counters
PM_FPU_FDIV	Number of floating point divisions (hardware)
PM_FPU_FMA	Number of floating point multiply-additions
PM_FXU_FIN	Number of fixed point operations producting a result
PM_FPU_FIN	Number of floating point operations producting a result
PM_CYC	Number of processor cycles
PM_FPU_FSQRT	Number of floating point square roots (hardware)
PM_INST_CMPL	Number of completed instructions
PM_FPU_FMOV_FEST	Number of floating point instructions FMOV or FEST

Remark The derived metrics of this event set feature HW floating point instructions. Please note that these include floating point store operations, which are not normally included in performance measures. Please check event set 60 for derived metrics with the floating point store operations excluded.

Derived Metrics
Utilization rate	User time divided by wall-clock time in percent
MIPS	Completed instructions divided by wall-clock time in 1000000/s
Instructions per cycle	Completed instructions divided by number of cycles
HW Float point instructions per Cycle	Sum of result producing operations on both FPUs divided by the number of cycles
HW floating point / user time	Sum of result producing operations on both FPUs divided by the user time, in 1000000 instructions per second
HW floating point rate	Sum of result producing operations on both FPUs divided by the wall-clock time, in 1000000 instructions per second