Derived Metrics 
Utilization rate 
User time divided by wallclock time in percent 
Total loads from L3 
Sum of loads from L3 & L3.5 in 1000000
operations 
% loads from L3 per cycle 
The
previous result divided by the number of cycles in percent 

L3 load traffic 
The above multiplied by a 128 byte cache line
cache line size of L2 relevant 

L3 load bandwidth 
The above divided by the wallclock
time
Includes many overheads for HPMCOUNT, more useful for
LIBHPM 

L3 load miss rate 
Sum of loads
from Memory
divided by the sum of loads from L3, L3.5 and Memory 

% loads from memory per cycle 

Load operations from main memory divided by the number
of cycles in percent 

Memory load traffic 
Loads from memory times a 512 byte cache line
Cache line size of L3 is relevant 

Memory load
bandwidth 
The above divided by the wallclock time
Includes many overheads for HPMCOUNT, more useful for
LIBHPM 

MIPS 
Completed instructions divided by
wallclock time in 1000000/s 
Instructions per cycle 
Completed instructions divided by number of cycles 