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Loading from memory, level 2 and level 3 cache

Use Event set 5 for investigations of the loads from main memory, the level 2 and level 3 caches.

Nomenclature of cache levels and locations
level 2 level 2 cache on same chip as processor
level 2.5 level 2 cache on different chip but same MCM as processor
level 2.75
level 2 cache on different MCM, inaccessible on HPCx, since outside LPAR
level 3 level 3 cache on same MCM
level 3.5
level 3 cache on different MCM, inaccessible on HPCx, since outside LPAR

Raw counters
PM_DATA_FROM_MEM Load operations from main memory
PM_DATA_FROM_L3 Load operations from level 3 cache
PM_DATA_FROM_L35 Load operations from level 3.5 cache
PM_DATA_FROM_L2 Load operations form level 2 cache
PM_DATA_FROM_L25_SHR Load operations from level 2.5 cache in `read only' state
PM_DATA_FROM_L25_MOD Load operations from level 2.5 cache in `exclusive' state
PM_DATA_FROM_L275_SHR Load operations from level 2.75 cache, `read only' state
PM_DATA_FROM_L275_MOD Load operations from level 2.75 cache, `exclusive' state

Derived Metrics
Total loads from L2
Sum of loads from L2, L2.5 & L2.75 in 1000000 operations
This includes data and instructions
L2 load traffic
The above multiplied by a 128 byte cache line
Cache line size of L1 and L2 is 128 bytes
L2 load bandwidth
The above divided by the wall-clock time
Includes many overheads for HPMCOUNT, more useful for LIBHPM
L2 load miss rate
Sum of loads from L3, L3.5 and Memory
divided by the sum of loads from L2, L2.5, L2.75, L3, L3.5 and Memory
Total loads from L3 Sum of loads from L3 & L3.5 in 1000000 operations
L3 load traffic
The above multiplied by a 128 byte cache line
Cache line size of L2 relevant
L3 load bandwidth
The above divided by the wall-clock time
Includes many overheads for HPMCOUNT, more useful for LIBHPM
L3 load miss rate
Sum of loads from Memory
divided by the sum of loads from L3, L3.5 and Memory
Memory load traffic
Loads from memory times a 512 byte cache line
Cache line size of L3 is relevant
Memory load bandwidth
The above divided by the wall-clock time
Includes many overheads for HPMCOUNT, more useful for LIBHPM


next up previous
Next: Cycles, instructions, loads from Up: HPM event sets and Previous: Cycles, instructions, TLB and
Joachim Hein
2003-11-03