Technical Report HPCxTR0512

"Parallel Performance of a UKAAC helicopter code on HPCx and other large-scale facilities", A. G. Sunderland, D. R. Emerson, C. B. Allen.

This paper will appear in the Proceedings of the Parallel CFD 2005 Conference to be published in May 2006 by Elsevier/North Holland. Details of the Conference and the Proceedings can be found here.

The paper is available for download as a PDF.

Update to charts in report

The performance graphs in the original report have now been updated with results from the recently upgraded HPCx machine. For the processor array sizes investigated here, the new HPCx p5-575 system-based architecture has improved the performance of ROTORMBMGP by upto 16% (on 64 procs) compared to the previous p690+ performance reported in the paper. The performance gain is mainly due to the to the improved memory subsystem of the p5-575. The parallel scaling properties of the code remain excellent.




Sheet1 Chart 11

Figure 3. Parallel performance of ROTORMBMGP on HPCx.






Sheet1 Chart 12

Figure 4. Parallel performance of ROTORMBMGP on four HPC architectures.